

<!DOCTYPE html>

<html>
  <head>
    <meta charset="utf-8" />
    <meta name="viewport" content="width=device-width, initial-scale=1.0" />
    <title>LLVM 9.0.0 Release Notes &#8212; LLVM 9 documentation</title>
    <link rel="stylesheet" href="_static/llvm-theme.css" type="text/css" />
    <link rel="stylesheet" href="_static/pygments.css" type="text/css" />
    <script id="documentation_options" data-url_root="./" src="_static/documentation_options.js"></script>
    <script src="_static/jquery.js"></script>
    <script src="_static/underscore.js"></script>
    <script src="_static/doctools.js"></script>
    <script src="_static/language_data.js"></script>
    <link rel="index" title="Index" href="genindex.html" />
    <link rel="search" title="Search" href="search.html" />
    <link rel="next" title="LLVM’s Analysis and Transform Passes" href="Passes.html" />
    <link rel="prev" title="5. Building a JIT: Remote-JITing – Process Isolation and Laziness at a Distance" href="tutorial/BuildingAJIT5.html" />
<style type="text/css">
  table.right { float: right; margin-left: 20px; }
  table.right td { border: 1px solid #ccc; }
</style>

  </head><body>
<div class="logo">
  <a href="index.html">
    <img src="_static/logo.png"
         alt="LLVM Logo" width="250" height="88"/></a>
</div>

    <div class="related" role="navigation" aria-label="related navigation">
      <h3>Navigation</h3>
      <ul>
        <li class="right" style="margin-right: 10px">
          <a href="genindex.html" title="General Index"
             accesskey="I">index</a></li>
        <li class="right" >
          <a href="Passes.html" title="LLVM’s Analysis and Transform Passes"
             accesskey="N">next</a> |</li>
        <li class="right" >
          <a href="tutorial/BuildingAJIT5.html" title="5. Building a JIT: Remote-JITing – Process Isolation and Laziness at a Distance"
             accesskey="P">previous</a> |</li>
  <li><a href="http://llvm.org/">LLVM Home</a>&nbsp;|&nbsp;</li>
  <li><a href="index.html">Documentation</a>&raquo;</li>

        <li class="nav-item nav-item-this"><a href="">LLVM 9.0.0 Release Notes</a></li> 
      </ul>
    </div>


    <div class="document">
      <div class="documentwrapper">
          <div class="body" role="main">
            
  <div class="section" id="llvm-9-0-0-release-notes">
<h1>LLVM 9.0.0 Release Notes<a class="headerlink" href="#llvm-9-0-0-release-notes" title="Permalink to this headline">¶</a></h1>
<div class="contents local topic" id="contents">
<ul class="simple">
<li><p><a class="reference internal" href="#introduction" id="id1">Introduction</a></p></li>
<li><p><a class="reference internal" href="#known-issues" id="id2">Known Issues</a></p></li>
<li><p><a class="reference internal" href="#non-comprehensive-list-of-changes-in-this-release" id="id3">Non-comprehensive list of changes in this release</a></p>
<ul>
<li><p><a class="reference internal" href="#noteworthy-optimizations" id="id4">Noteworthy optimizations</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-llvm-ir" id="id5">Changes to the LLVM IR</a></p></li>
<li><p><a class="reference internal" href="#changes-to-building-llvm" id="id6">Changes to building LLVM</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-aarch64-backend" id="id7">Changes to the AArch64 Backend</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-arm-backend" id="id8">Changes to the ARM Backend</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-mips-target" id="id9">Changes to the MIPS Target</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-powerpc-target" id="id10">Changes to the PowerPC Target</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-systemz-target" id="id11">Changes to the SystemZ Target</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-x86-target" id="id12">Changes to the X86 Target</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-amdgpu-target" id="id13">Changes to the AMDGPU Target</a></p></li>
<li><p><a class="reference internal" href="#changes-to-the-riscv-target" id="id14">Changes to the RISCV Target</a></p></li>
</ul>
</li>
<li><p><a class="reference internal" href="#changes-to-lldb" id="id15">Changes to LLDB</a></p></li>
<li><p><a class="reference internal" href="#external-open-source-projects-using-llvm-9" id="id16">External Open Source Projects Using LLVM 9</a></p>
<ul>
<li><p><a class="reference internal" href="#mull-mutation-testing-tool-for-c-and-c" id="id17">Mull - Mutation Testing tool for C and C++</a></p></li>
<li><p><a class="reference internal" href="#portable-computing-language-pocl" id="id18">Portable Computing Language (pocl)</a></p></li>
<li><p><a class="reference internal" href="#tta-based-co-design-environment-tce" id="id19">TTA-based Co-design Environment (TCE)</a></p></li>
<li><p><a class="reference internal" href="#zig-programming-language" id="id20">Zig Programming Language</a></p></li>
<li><p><a class="reference internal" href="#ldc-the-llvm-based-d-compiler" id="id21">LDC - the LLVM-based D compiler</a></p></li>
</ul>
</li>
<li><p><a class="reference internal" href="#additional-information" id="id22">Additional Information</a></p></li>
</ul>
</div>
<div class="section" id="introduction">
<h2><a class="toc-backref" href="#id1">Introduction</a><a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
<p>This document contains the release notes for the LLVM Compiler Infrastructure,
release 9.0.0.  Here we describe the status of LLVM, including major improvements
from the previous release, improvements in various subprojects of LLVM, and
some of the current users of the code.  All LLVM releases may be downloaded
from the <a class="reference external" href="https://llvm.org/releases/">LLVM releases web site</a>.</p>
<p>For more information about LLVM, including information about the latest
release, please check out the <a class="reference external" href="https://llvm.org/">main LLVM web site</a>.  If you
have questions or comments, the <a class="reference external" href="https://lists.llvm.org/mailman/listinfo/llvm-dev">LLVM Developer’s Mailing List</a> is a good place to send
them.</p>
</div>
<div class="section" id="known-issues">
<h2><a class="toc-backref" href="#id2">Known Issues</a><a class="headerlink" href="#known-issues" title="Permalink to this headline">¶</a></h2>
<p>These are issues that couldn’t be fixed before the release. See the bug reports
for the latest status.</p>
<ul class="simple">
<li><p><a class="reference external" href="https://llvm.org/pr40547">PR40547</a> Clang gets miscompiled by GCC 9.</p></li>
</ul>
</div>
<div class="section" id="non-comprehensive-list-of-changes-in-this-release">
<h2><a class="toc-backref" href="#id3">Non-comprehensive list of changes in this release</a><a class="headerlink" href="#non-comprehensive-list-of-changes-in-this-release" title="Permalink to this headline">¶</a></h2>
<ul class="simple">
<li><p>Two new extension points, namely <code class="docutils literal notranslate"><span class="pre">EP_FullLinkTimeOptimizationEarly</span></code> and
<code class="docutils literal notranslate"><span class="pre">EP_FullLinkTimeOptimizationLast</span></code> are available for plugins to specialize
the legacy pass manager full LTO pipeline.</p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">llvm-objcopy/llvm-strip</span></code> got support for COFF object files/executables,
supporting the most common copying/stripping options.</p></li>
<li><p>The CMake parameter <code class="docutils literal notranslate"><span class="pre">CLANG_ANALYZER_ENABLE_Z3_SOLVER</span></code> has been replaced by
<code class="docutils literal notranslate"><span class="pre">LLVM_ENABLE_Z3_SOLVER</span></code>.</p></li>
<li><p>The RISCV target is no longer “experimental” (see
<a class="reference internal" href="#changes-to-the-riscv-target">Changes to the RISCV Target</a> below for more details).</p></li>
<li><p>The ORCv1 JIT API has been deprecated. Please see
<a class="reference external" href="ORCv2.html#transitioning-from-orcv1-to-orcv2">Transitioning from ORCv1 to ORCv2</a>.</p></li>
<li><p>Support for target-independent hardware loops in IR has been added, with
PowerPC and Arm implementations.</p></li>
</ul>
<div class="section" id="noteworthy-optimizations">
<h3><a class="toc-backref" href="#id4">Noteworthy optimizations</a><a class="headerlink" href="#noteworthy-optimizations" title="Permalink to this headline">¶</a></h3>
<ul>
<li><p>LLVM will now remove stores to constant memory (since this is a
contradiction) under the assumption the code in question must be dead.  This
has proven to be problematic for some C/C++ code bases which expect to be
able to cast away ‘const’.  This is (and has always been) undefined
behavior, but up until now had not been actively utilized for optimization
purposes in this exact way.  For more information, please see:
<a class="reference external" href="https://bugs.llvm.org/show_bug.cgi?id=42763">bug 42763</a> and
<a class="reference external" href="http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190422/646945.html">post commit discussion</a>.</p></li>
<li><p>The optimizer will now convert calls to <code class="docutils literal notranslate"><span class="pre">memcmp</span></code> into a calls to <code class="docutils literal notranslate"><span class="pre">bcmp</span></code> in
some circumstances. Users who are building freestanding code (not depending on
the platform’s libc) without specifying <code class="docutils literal notranslate"><span class="pre">-ffreestanding</span></code> may need to either
pass <code class="docutils literal notranslate"><span class="pre">-fno-builtin-bcmp</span></code>, or provide a <code class="docutils literal notranslate"><span class="pre">bcmp</span></code> function.</p></li>
<li><p>LLVM will now pattern match wide scalar values stored by a succession of
narrow stores. For example, Clang will compile the following function that
writes a 32-bit value in big-endian order in a portable manner:</p>
<div class="highlight-c notranslate"><div class="highlight"><pre><span></span><span class="kt">void</span> <span class="nf">write32be</span><span class="p">(</span><span class="kt">unsigned</span> <span class="kt">char</span> <span class="o">*</span><span class="n">dst</span><span class="p">,</span> <span class="kt">uint32_t</span> <span class="n">x</span><span class="p">)</span> <span class="p">{</span>
  <span class="n">dst</span><span class="p">[</span><span class="mi">0</span><span class="p">]</span> <span class="o">=</span> <span class="n">x</span> <span class="o">&gt;&gt;</span> <span class="mi">24</span><span class="p">;</span>
  <span class="n">dst</span><span class="p">[</span><span class="mi">1</span><span class="p">]</span> <span class="o">=</span> <span class="n">x</span> <span class="o">&gt;&gt;</span> <span class="mi">16</span><span class="p">;</span>
  <span class="n">dst</span><span class="p">[</span><span class="mi">2</span><span class="p">]</span> <span class="o">=</span> <span class="n">x</span> <span class="o">&gt;&gt;</span> <span class="mi">8</span><span class="p">;</span>
  <span class="n">dst</span><span class="p">[</span><span class="mi">3</span><span class="p">]</span> <span class="o">=</span> <span class="n">x</span> <span class="o">&gt;&gt;</span> <span class="mi">0</span><span class="p">;</span>
<span class="p">}</span>
</pre></div>
</div>
<p>into the x86_64 code below:</p>
<div class="highlight-asm notranslate"><div class="highlight"><pre><span></span><span class="nl">write32be:</span>
        <span class="nf">bswap</span>   <span class="no">esi</span>
        <span class="nf">mov</span>     <span class="no">dword</span> <span class="no">ptr</span> <span class="p">[</span><span class="no">rdi</span><span class="p">],</span> <span class="no">esi</span>
        <span class="nf">ret</span>
</pre></div>
</div>
<p>(The corresponding read patterns have been matched since LLVM 5.)</p>
</li>
<li><p>LLVM will now omit range checks for jump tables when lowering switches with
unreachable default destination. For example, the switch dispatch in the C++
code below</p>
<div class="highlight-c notranslate"><div class="highlight"><pre><span></span><span class="kt">int</span> <span class="nf">g</span><span class="p">(</span><span class="kt">int</span><span class="p">);</span>
<span class="k">enum</span> <span class="n">e</span> <span class="p">{</span> <span class="n">A</span><span class="p">,</span> <span class="n">B</span><span class="p">,</span> <span class="n">C</span><span class="p">,</span> <span class="n">D</span><span class="p">,</span> <span class="n">E</span> <span class="p">};</span>
<span class="kt">int</span> <span class="nf">f</span><span class="p">(</span><span class="n">e</span> <span class="n">x</span><span class="p">,</span> <span class="kt">int</span> <span class="n">y</span><span class="p">,</span> <span class="kt">int</span> <span class="n">z</span><span class="p">)</span> <span class="p">{</span>
  <span class="k">switch</span><span class="p">(</span><span class="n">x</span><span class="p">)</span> <span class="p">{</span>
    <span class="k">case</span> <span class="nl">A</span><span class="p">:</span> <span class="k">return</span> <span class="n">g</span><span class="p">(</span><span class="n">y</span><span class="p">);</span>
    <span class="k">case</span> <span class="nl">B</span><span class="p">:</span> <span class="k">return</span> <span class="n">g</span><span class="p">(</span><span class="n">z</span><span class="p">);</span>
    <span class="k">case</span> <span class="nl">C</span><span class="p">:</span> <span class="k">return</span> <span class="n">g</span><span class="p">(</span><span class="n">y</span><span class="o">+</span><span class="n">z</span><span class="p">);</span>
    <span class="k">case</span> <span class="nl">D</span><span class="p">:</span> <span class="k">return</span> <span class="n">g</span><span class="p">(</span><span class="n">x</span><span class="o">-</span><span class="n">z</span><span class="p">);</span>
    <span class="k">case</span> <span class="nl">E</span><span class="p">:</span> <span class="k">return</span> <span class="n">g</span><span class="p">(</span><span class="n">x</span><span class="o">+</span><span class="n">z</span><span class="p">);</span>
  <span class="p">}</span>
<span class="p">}</span>
</pre></div>
</div>
<p>will result in the following x86_64 machine code when compiled with Clang.
This is because falling off the end of a non-void function is undefined
behaviour in C++, and the end of the function therefore being treated as
unreachable:</p>
<div class="highlight-asm notranslate"><div class="highlight"><pre><span></span>_Z1f1eii:
        mov     eax, edi
        jmp     qword ptr [8*rax + .LJTI0_0]
</pre></div>
</div>
</li>
<li><p>LLVM can now sink similar instructions to a common successor block also when
the instructions have no uses, such as calls to void functions. This allows
code such as</p>
<div class="highlight-c notranslate"><div class="highlight"><pre><span></span><span class="kt">void</span> <span class="nf">g</span><span class="p">(</span><span class="kt">int</span><span class="p">);</span>
<span class="k">enum</span> <span class="n">e</span> <span class="p">{</span> <span class="n">A</span><span class="p">,</span> <span class="n">B</span><span class="p">,</span> <span class="n">C</span><span class="p">,</span> <span class="n">D</span> <span class="p">};</span>
<span class="kt">void</span> <span class="nf">f</span><span class="p">(</span><span class="n">e</span> <span class="n">x</span><span class="p">,</span> <span class="kt">int</span> <span class="n">y</span><span class="p">,</span> <span class="kt">int</span> <span class="n">z</span><span class="p">)</span> <span class="p">{</span>
  <span class="k">switch</span><span class="p">(</span><span class="n">x</span><span class="p">)</span> <span class="p">{</span>
    <span class="k">case</span> <span class="nl">A</span><span class="p">:</span> <span class="n">g</span><span class="p">(</span><span class="mi">6</span><span class="p">);</span> <span class="k">break</span><span class="p">;</span>
    <span class="k">case</span> <span class="nl">B</span><span class="p">:</span> <span class="n">g</span><span class="p">(</span><span class="mi">3</span><span class="p">);</span> <span class="k">break</span><span class="p">;</span>
    <span class="k">case</span> <span class="nl">C</span><span class="p">:</span> <span class="n">g</span><span class="p">(</span><span class="mi">9</span><span class="p">);</span> <span class="k">break</span><span class="p">;</span>
    <span class="k">case</span> <span class="nl">D</span><span class="p">:</span> <span class="n">g</span><span class="p">(</span><span class="mi">2</span><span class="p">);</span> <span class="k">break</span><span class="p">;</span>
  <span class="p">}</span>
<span class="p">}</span>
</pre></div>
</div>
<p>to be optimized to a single call to <code class="docutils literal notranslate"><span class="pre">g</span></code>, with the argument loaded from a
lookup table.</p>
</li>
</ul>
</div>
<div class="section" id="changes-to-the-llvm-ir">
<h3><a class="toc-backref" href="#id5">Changes to the LLVM IR</a><a class="headerlink" href="#changes-to-the-llvm-ir" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Added <code class="docutils literal notranslate"><span class="pre">immarg</span></code> parameter attribute. This indicates an intrinsic
parameter is required to be a simple constant. This annotation must
be accurate to avoid possible miscompiles.</p></li>
<li><p>The 2-field form of global variables <code class="docutils literal notranslate"><span class="pre">&#64;llvm.global_ctors</span></code> and
<code class="docutils literal notranslate"><span class="pre">&#64;llvm.global_dtors</span></code> has been deleted. The third field of their element
type is now mandatory. Specify <cite>i8* null</cite> to migrate from the obsoleted
2-field form.</p></li>
<li><p>The <code class="docutils literal notranslate"><span class="pre">byval</span></code> attribute can now take a type parameter:
<code class="docutils literal notranslate"><span class="pre">byval(&lt;ty&gt;)</span></code>. If present it must be identical to the argument’s
pointee type. In the next release we intend to make this parameter
mandatory in preparation for opaque pointer types.</p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">atomicrmw</span> <span class="pre">xchg</span></code> now allows floating point types</p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">atomicrmw</span></code> now supports <code class="docutils literal notranslate"><span class="pre">fadd</span></code> and <code class="docutils literal notranslate"><span class="pre">fsub</span></code></p></li>
</ul>
</div>
<div class="section" id="changes-to-building-llvm">
<h3><a class="toc-backref" href="#id6">Changes to building LLVM</a><a class="headerlink" href="#changes-to-building-llvm" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Building LLVM with Visual Studio now requires version 2017 or later.</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-aarch64-backend">
<h3><a class="toc-backref" href="#id7">Changes to the AArch64 Backend</a><a class="headerlink" href="#changes-to-the-aarch64-backend" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Assembly-level support was added for: Scalable Vector Extension 2 (SVE2) and
Memory Tagging Extensions (MTE).</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-arm-backend">
<h3><a class="toc-backref" href="#id8">Changes to the ARM Backend</a><a class="headerlink" href="#changes-to-the-arm-backend" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Assembly-level support was added for the Armv8.1-M architecture, including
the M-Profile Vector Extension (MVE).</p></li>
<li><p>A pipeline model was added for Cortex-M4. This pipeline model is also used to
tune for cores where this gives a benefit too: Cortex-M3, SC300, Cortex-M33
and Cortex-M35P.</p></li>
<li><p>Code generation support for M-profile low-overhead loops.</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-mips-target">
<h3><a class="toc-backref" href="#id9">Changes to the MIPS Target</a><a class="headerlink" href="#changes-to-the-mips-target" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Support for <code class="docutils literal notranslate"><span class="pre">.cplocal</span></code> assembler directive.</p></li>
<li><p>Support for <code class="docutils literal notranslate"><span class="pre">sge</span></code>, <code class="docutils literal notranslate"><span class="pre">sgeu</span></code>, <code class="docutils literal notranslate"><span class="pre">sgt</span></code>, <code class="docutils literal notranslate"><span class="pre">sgtu</span></code> pseudo instructions.</p></li>
<li><p>Support for <code class="docutils literal notranslate"><span class="pre">o</span></code> inline asm constraint.</p></li>
<li><p>Improved support of GlobalISel instruction selection framework.
This feature is still in experimental state for MIPS targets though.</p></li>
<li><p>Various code-gen improvements, related to improved and fixed instruction
selection and encoding and floating-point registers allocation.</p></li>
<li><p>Complete P5600 scheduling model.</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-powerpc-target">
<h3><a class="toc-backref" href="#id10">Changes to the PowerPC Target</a><a class="headerlink" href="#changes-to-the-powerpc-target" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Improved handling of TOC pointer spills for indirect calls</p></li>
<li><p>Improve precision of square root reciprocal estimate</p></li>
<li><p>Enabled MachinePipeliner support for P9 with <code class="docutils literal notranslate"><span class="pre">-ppc-enable-pipeliner</span></code>.</p></li>
<li><p>MMX/SSE/SSE2 intrinsics headers have been ported to PowerPC using Altivec.</p></li>
<li><p>Machine verification failures cleaned, EXPENSIVE_CHECKS will run
MachineVerification by default now.</p></li>
<li><p>PowerPC scheduling enhancements, with customized PPC specific scheduler
strategy.</p></li>
<li><p>Inner most loop now always align to 32 bytes.</p></li>
<li><p>Enhancements of hardware loops interaction with LSR.</p></li>
<li><p>New builtins added, eg: <code class="docutils literal notranslate"><span class="pre">__builtin_setrnd</span></code>.</p></li>
<li><p>Various codegen improvements for both scalar and vector code</p></li>
<li><p>Various new exploitations and bug fixes, e.g: exploited P9 <code class="docutils literal notranslate"><span class="pre">maddld</span></code>.</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-systemz-target">
<h3><a class="toc-backref" href="#id11">Changes to the SystemZ Target</a><a class="headerlink" href="#changes-to-the-systemz-target" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Support for the arch13 architecture has been added.  When using the
<code class="docutils literal notranslate"><span class="pre">-march=arch13</span></code> option, the compiler will generate code making use of
new instructions introduced with the vector enhancement facility 2
and the miscellaneous instruction extension facility 2.
The <code class="docutils literal notranslate"><span class="pre">-mtune=arch13</span></code> option enables arch13 specific instruction
scheduling and tuning without making use of new instructions.</p></li>
<li><p>Builtins for the new vector instructions have been added and can be
enabled using the <code class="docutils literal notranslate"><span class="pre">-mzvector</span></code> option.  Support for these builtins
is indicated by the compiler predefining the <code class="docutils literal notranslate"><span class="pre">__VEC__</span></code> macro to
the value <code class="docutils literal notranslate"><span class="pre">10303</span></code>.</p></li>
<li><p>The compiler now supports and automatically generates alignment hints
on vector load and store instructions.</p></li>
<li><p>Various code-gen improvements, in particular related to improved
instruction selection and register allocation.</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-x86-target">
<h3><a class="toc-backref" href="#id12">Changes to the X86 Target</a><a class="headerlink" href="#changes-to-the-x86-target" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Fixed a bug in generating DWARF unwind information for 32 bit MinGW</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-amdgpu-target">
<h3><a class="toc-backref" href="#id13">Changes to the AMDGPU Target</a><a class="headerlink" href="#changes-to-the-amdgpu-target" title="Permalink to this headline">¶</a></h3>
<ul class="simple">
<li><p>Function call support is now enabled by default</p></li>
<li><p>Improved support for 96-bit loads and stores</p></li>
<li><p>DPP combiner pass is now enabled by default</p></li>
<li><p>Support for gfx10</p></li>
</ul>
</div>
<div class="section" id="changes-to-the-riscv-target">
<h3><a class="toc-backref" href="#id14">Changes to the RISCV Target</a><a class="headerlink" href="#changes-to-the-riscv-target" title="Permalink to this headline">¶</a></h3>
<p>The RISCV target is no longer “experimental”! It’s now built by default,
rather than needing to be enabled with <code class="docutils literal notranslate"><span class="pre">LLVM_EXPERIMENTAL_TARGETS_TO_BUILD</span></code>.</p>
<p>The backend has full codegen support for the RV32I and RV64I base RISC-V
instruction set variants, with the MAFDC standard extensions. We support the
hard and soft-float ABIs for these targets. Testing has been performed with
both Linux and bare-metal targets, including the compilation of a large corpus
of Linux applications (through buildroot).</p>
</div>
</div>
<div class="section" id="changes-to-lldb">
<h2><a class="toc-backref" href="#id15">Changes to LLDB</a><a class="headerlink" href="#changes-to-lldb" title="Permalink to this headline">¶</a></h2>
<ul class="simple">
<li><p>Backtraces are now color highlighting in the terminal.</p></li>
<li><p>DWARF4 (debug_types) and DWARF5 (debug_info) type units are now supported.</p></li>
<li><p>This release will be the last where <code class="docutils literal notranslate"><span class="pre">lldb-mi</span></code> is shipped as part of LLDB.
The tool will still be available in a <a class="reference external" href="https://github.com/lldb-tools/lldb-mi">downstream repository on GitHub</a>.</p></li>
</ul>
</div>
<div class="section" id="external-open-source-projects-using-llvm-9">
<h2><a class="toc-backref" href="#id16">External Open Source Projects Using LLVM 9</a><a class="headerlink" href="#external-open-source-projects-using-llvm-9" title="Permalink to this headline">¶</a></h2>
<div class="section" id="mull-mutation-testing-tool-for-c-and-c">
<h3><a class="toc-backref" href="#id17">Mull - Mutation Testing tool for C and C++</a><a class="headerlink" href="#mull-mutation-testing-tool-for-c-and-c" title="Permalink to this headline">¶</a></h3>
<p><a class="reference external" href="https://github.com/mull-project/mull">Mull</a> is an LLVM-based tool for
mutation testing with a strong focus on C and C++ languages.</p>
</div>
<div class="section" id="portable-computing-language-pocl">
<h3><a class="toc-backref" href="#id18">Portable Computing Language (pocl)</a><a class="headerlink" href="#portable-computing-language-pocl" title="Permalink to this headline">¶</a></h3>
<p>In addition to producing an easily portable open source OpenCL
implementation, another major goal of <a class="reference external" href="http://portablecl.org/">pocl</a>
is improving performance portability of OpenCL programs with
compiler optimizations, reducing the need for target-dependent manual
optimizations. An important part of pocl is a set of LLVM passes used to
statically parallelize multiple work-items with the kernel compiler, even in
the presence of work-group barriers. This enables static parallelization of
the fine-grained static concurrency in the work groups in multiple ways.</p>
</div>
<div class="section" id="tta-based-co-design-environment-tce">
<h3><a class="toc-backref" href="#id19">TTA-based Co-design Environment (TCE)</a><a class="headerlink" href="#tta-based-co-design-environment-tce" title="Permalink to this headline">¶</a></h3>
<p><a class="reference external" href="http://openasip.org/">TCE</a> is an open source toolset for designing customized
processors based on the Transport Triggered Architecture (TTA).
The toolset provides a complete co-design flow from C/C++
programs down to synthesizable VHDL/Verilog and parallel program binaries.
Processor customization points include register files, function units,
supported operations, and the interconnection network.</p>
<p>TCE uses Clang and LLVM for C/C++/OpenCL C language support, target independent
optimizations and also for parts of code generation. It generates new
LLVM-based code generators “on the fly” for the designed TTA processors and
loads them in to the compiler backend as runtime libraries to avoid
per-target recompilation of larger parts of the compiler chain.</p>
</div>
<div class="section" id="zig-programming-language">
<h3><a class="toc-backref" href="#id20">Zig Programming Language</a><a class="headerlink" href="#zig-programming-language" title="Permalink to this headline">¶</a></h3>
<p><a class="reference external" href="https://ziglang.org">Zig</a>  is a system programming language intended to be
an alternative to C. It provides high level features such as generics, compile
time function execution, and partial evaluation, while exposing low level LLVM
IR features such as aliases and intrinsics. Zig uses Clang to provide automatic
import of .h symbols, including inline functions and simple macros. Zig uses
LLD combined with lazily building compiler-rt to provide out-of-the-box
cross-compiling for all supported targets.</p>
</div>
<div class="section" id="ldc-the-llvm-based-d-compiler">
<h3><a class="toc-backref" href="#id21">LDC - the LLVM-based D compiler</a><a class="headerlink" href="#ldc-the-llvm-based-d-compiler" title="Permalink to this headline">¶</a></h3>
<p><a class="reference external" href="http://dlang.org">D</a> is a language with C-like syntax and static typing. It
pragmatically combines efficiency, control, and modeling power, with safety and
programmer productivity. D supports powerful concepts like Compile-Time Function
Execution (CTFE) and Template Meta-Programming, provides an innovative approach
to concurrency and offers many classical paradigms.</p>
<p><a class="reference external" href="http://wiki.dlang.org/LDC">LDC</a> uses the frontend from the reference compiler
combined with LLVM as backend to produce efficient native code. LDC targets
x86/x86_64 systems like Linux, OS X, FreeBSD and Windows and also Linux on ARM
and PowerPC (32/64 bit). Ports to other architectures are underway.</p>
</div>
</div>
<div class="section" id="additional-information">
<h2><a class="toc-backref" href="#id22">Additional Information</a><a class="headerlink" href="#additional-information" title="Permalink to this headline">¶</a></h2>
<p>A wide variety of additional information is available on the <a class="reference external" href="https://llvm.org/">LLVM web page</a>, in particular in the <a class="reference external" href="https://llvm.org/docs/">documentation</a> section.  The web page also contains versions of the
API documentation which is up-to-date with the Subversion version of the source
code.  You can access versions of these documents specific to this release by
going into the <code class="docutils literal notranslate"><span class="pre">llvm/docs/</span></code> directory in the LLVM tree.</p>
<p>If you have any questions or comments about LLVM, please feel free to contact
us via the <a class="reference external" href="https://llvm.org/docs/#mailing-lists">mailing lists</a>.</p>
</div>
</div>


            <div class="clearer"></div>
          </div>
      </div>
      <div class="clearer"></div>
    </div>
    <div class="related" role="navigation" aria-label="related navigation">
      <h3>Navigation</h3>
      <ul>
        <li class="right" style="margin-right: 10px">
          <a href="genindex.html" title="General Index"
             >index</a></li>
        <li class="right" >
          <a href="Passes.html" title="LLVM’s Analysis and Transform Passes"
             >next</a> |</li>
        <li class="right" >
          <a href="tutorial/BuildingAJIT5.html" title="5. Building a JIT: Remote-JITing – Process Isolation and Laziness at a Distance"
             >previous</a> |</li>
  <li><a href="http://llvm.org/">LLVM Home</a>&nbsp;|&nbsp;</li>
  <li><a href="index.html">Documentation</a>&raquo;</li>

        <li class="nav-item nav-item-this"><a href="">LLVM 9.0.0 Release Notes</a></li> 
      </ul>
    </div>
    <div class="footer" role="contentinfo">
        &#169; Copyright 2003-2020, LLVM Project.
      Last updated on 2020-09-20.
      Created using <a href="https://www.sphinx-doc.org/">Sphinx</a> 3.2.1.
    </div>
  </body>
</html>